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A 1.5 V, 0.85-13.35 GHZ MMIC Low Noise Amplifier Design Using Optimization Technique

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Author(s): Marzuki Arjuna | Md. Shakaff Ali | Sauli Zaliman

Journal: IETE Journal of Research
ISSN 0377-2063

Volume: 55;
Issue: 6;
Start page: 309;
Date: 2009;
Original page

Keywords: Broadband amplifier | Integrated circuit | Monolithic microwave integrated circuit | optimization | pseudomorphic high electron mobility transistor | power-constrained.

ABSTRACT
This paper describes how a broadband, 1.5 V, 0.85 - 13.35 GHz low noise amplifier in 0.15 mm 85 GHz PHEMT -process is synthesized to simultaneously meet multiple design specifications such as bandwidth, noise f0 igure, power gain and power consumption. Power-constrained synthesis technique is used to design the broadband amplifier. The -simulated peak S21 is 19.8 dB, maximum noise Figure is 2.5 dB, 3-dB bandwidth is 12.5 GHz and power consumption is 73.5 mW. The calculated Figure of merit (FOM) is better than many reported broadband low noise amplifier (LNA).
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