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A 16-Bit Fully Functional Single Cycle Processor

Author(s): Nidhi Maheshwari | Pramod Kumar Jain | D.S. Ajnar

Journal: International Journal of Engineering Science and Technology
ISSN 0975-5462

Volume: 3;
Issue: 8;
Start page: 6219;
Date: 2011;
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Keywords: Arithmetic logical unit (ALU) | control unit (CU) | comparator | shifter | rotations | instruction set | VHDL | Xilinx.

The existing commercial microprocessors are provided as black box units, with which users are unable to monitor internal signals and operation process, neither can they modify the original structure. Inorder to solve this problem 16-bit fully functional single cycle processor is designed in terms of its architecture and its functional capabilities. The procedure of design and verification for a 16-bit processor is introduced in this paper. The key architecture elements are being described, as well as the hardware block diagram and internal structure. The summary of instruction set is presented. This processor is modify as a Very High Speed Integrated Circuit Hardware Description Language (VHDL) and gives access to every internal signal. In order to consume fewer resources, the design of arithmetic logical unit (ALU) is optimized. The RTL views and verified simulation results of processor are shown in this paper. The synthesis report of the design is also described. The design architecture is written in Very High Speed Integrated Circuit Hardware Description Language (VHDL) code using Xilinx ISE 9.2i tool for synthesis and simulation.
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