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Analog VLSI Implementation of Neural Network Architecture for Signal Processing

Author(s): Neeraj Chasta | Sarita Chouhan | Yogesh Kumar

Journal: International Journal of VLSI Design & Communication Systems
ISSN 0976-1527

Volume: 3;
Issue: 2;
Start page: 243;
Date: 2012;
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Keywords: Neural Network Architecture | Back Propagation Algorithm

With the advent of new technologies and advancement in medical science we are trying to process the information artificially as our biological system performs inside our body. Artificial intelligence through a biological word is realized based on mathematical equations and artificial neurons. Our main focus is on the implementation of Neural Network Architecture (NNA) with on a chip learning in analog VLSI for generic signal processing applications. In the proposed paper analog components like Gilbert Cell Multiplier (GCM), Neuron activation Function (NAF) are used to implement artificial NNA. The analog components used are comprises of multipliers and adders’ along with the tan-sigmoid function circuit using MOS transistor in subthreshold region. This neural architecture is trained using Back propagation (BP) algorithm in analog domain with new techniques of weight storage. Layout design and verification of the proposed design is carried out using Tanner EDA 14.1 tool and synopsys Tspice. The technology usedin designing the layouts is MOSIS/HP 0.5u SCN3M, Tight Metal.
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