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An Approach for Implementing State Machines with Online Testability

Author(s): P. K. Lala | A. Mathews | J. P. Parkerson

Journal: VLSI Design
ISSN 1065-514X

Volume: 2010;
Date: 2010;
Original page

During the last two decades, significant amount of research has been performed to simplify the detection of transient or soft errors in VLSI-based digital systems. This paper proposes an approach for implementing state machines that uses 2-hot code for state encoding. State machines designed using this approach allow online detection of soft errors in registers and output logic. The 2-hot code considerably reduces the number of required flip-flops and leads to relatively straightforward implementation of next state and output logic. A new way of designing output logic for online fault detection has also been presented.
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