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Architecture of digital signal’s processing units with the rebuildable structure

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Author(s): Sheik-Seikin A. N.

Journal: Tekhnologiya i Konstruirovanie v Elektronnoi Apparature
ISSN 2225-5818

Issue: 4;
Start page: 10;
Date: 2011;
Original page

Keywords: affine transformations | sidelobe canceller | information links graph | computer system architecture | computational resource | switching resource

ABSTRACT
The synthesis technique is developed for the computing system architecture with tunable structure with graph of information connections (GIC) affine transformations which assumes additional equipment of initial computing system (CS) with the appropriate switching system implementing, depending on character of GIC change, one of the methods of block reorganization providing effective implementation of CS in wide range of GIC parameters change. The received estimations of hardware expenses for various methods of reorganization allow to define efficiency of CS implementation for each specific case.
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