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Design of Delay E fficient Distributed Arithmetic Based Split Radix FFT

Author(s): Nisha Laguri | K. Anusudha

Journal: International Journal of Engineering Trends and Technology
ISSN 2231-5381

Volume: 5;
Issue: 7;
Start page: 341;
Date: 2013;
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Keywords: Split Radix | Fast Fourier Transform (FFT) | DA | Parallel Prefix Adder

In this paper a Split Radix FFT without the use of multiplier is designed. All the complex multiplications are done by using Distributed Arithmetic (DA) technique. For faster calculation parallel prefix adder is used. Basically high radix algorithms are developed for efficient calculation of FFT. These algorithms reduces overallarithmetic operations in FFT, but increases the number ofoperations and complexity of each butterfly. In Split Radix FFT, mixed-radix approach helps to achieve low number of multiplications and additions. DA is basically a bit-serial computational operation that forms an inner (dot) product of a pair of vectors in a single direct step. The advantage of DA is its efficiency of mechanization. Amethod is incorporated to overcome the overflow problem introduced by DA method.

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