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Design and Development of Texture Filtering Architecture for GPU Application Using Reconfigurable Computing

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Author(s): Sanket Suresh Naik Dessai

Journal: International Journal of Reconfigurable and Embedded Systems (IJRES)
ISSN 2089-4864

Volume: 1;
Issue: 3;
Start page: 108;
Date: 2012;
Original page

ABSTRACT
Graphical Processing Units (GPUs) have become an integral part of today’s mainstream computing systems. They are also being used as reprogrammable General Purpose GPUs (GP-GPUs) to perform complex scientific computations. Reconfigurability is an attractive approach to embedded systems allowing hardware level modification.  Hence, there is a high demand for GPU designs based on reconfigurable hardware. The texture filter unit is designed to process geometric data like vertices and convert these into pixels on the screen. This process involves number of operations, like circle and cube generation, rotator, and scaling. The texture filter unit is designed with all necessary hardware to deal with all the different filtering operations. The designed texture filtering units are modelled in Verilog on Altera Quartus II and simulated using ModelSim tools. The functionality of the modelled blocks is verified using test inputs in the simulator.Circle and cube coordinates are generated for circle and cube generation. The work can form the basis for designing a complete reconfigurable GPU.
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