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EFM++ An Efficient Coding Format for DVD

Author(s): Bane Vasić | Goran Lj. Đorđević | Milorad Tošić

Journal: Facta Universitatis Series : Electronics and Energetics
ISSN 0353-3670

Volume: 13;
Issue: 3;
Start page: 263;
Date: 2000;
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Keywords: Coding format EFM++ | DVD | encoding algorithm | Trellis searching algorithm.

In Digital Versatile Disc systems [3] the low frequency content of the channel modulation code needs to be minimized in order to reduce interference with the tracking servo system. The modulation code standard for DVD is so called Eight-to-Fourteen Plus (EFM+) code, which is a rate 8/16 runlength limited (d,k)=(2,10) four state code. The task of constructing simple runlength code capable of controlling low frequency content is difficult, and the careful look at the EFM+ code reveals several 'tricks' that made it possible. Certainly the most important of them is the code 'multimodality', which means that the choice of the output word is depends not only on the finite state machine state and the input word, but also of some external quantity (in the EFM+ case it is the running digital sum (RDS)). The DVD specifications [10] define the EFM+ decoder, but leave large freedom in construction of the encoder. More precisely, the encoding rule is considered valid as long as decoder can decode codeword properly. This motivated the question whether it is possible to find better codeword selection rule then the rule described in original EFM+. This paper shows that the answer is positive, and describes an EFM+ like modulation code which provides very efficient low-frequency spectral content suppression in the coded signal. An anticipation is introduced in the encoding algorithm, so that the selection of the codewords is based on permanent control of the recorded sequence RDS. The selection of the optimal codeword in the algorithm is performed by using the trellis searching algorithm for the RDS control and optimal codeword tracking. The papers also gives the code analysis, the comparison with theoretically achievable performances and describes in detail hardware implementation of the encoder.
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