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Multi-Standard Programmable Baseband Modulator for Next Generation Wireless Communication

Author(s): Indranil Hatai | Indrajit Chakrabarti

Journal: International journal of Computer Networks & Communications
ISSN 0975-2293

Volume: 2;
Issue: 4;
Start page: 58;
Date: 2010;
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Keywords: SDR Architecture | FPGA | RRC Filter | DA Technique | QPSK Modulation and its other three variants

Considerable research has taken place in recent times in the area of parameterization of software definedradio (SDR) architecture. Parameterization decreases the size of the software to be downloaded and alsolimits the hardware reconfiguration time. The present paper is based on the design and development of aprogrammable baseband modulator that perform the QPSK modulation schemes and as well as its otherthree commonly used variants to satisfy the requirement of several established 2G and 3G wirelesscommunication standards. The proposed design has been shown to be capable of operating at a maximumdata rate of 77 Mbps on Xilinx Virtex 2-Pro University field programmable gate array (FPGA) board.The pulse shaping root raised cosine (RRC) filter has been implemented using distributed arithmetic (DA)technique in the present work in order to reduce the computational complexity, and to achieveappropriate power reduction and enhanced throughput. The designed multiplier-less programmable 32-tap FIR-based RRC filter has been found to withstand a peak inter-symbol interference (ISI) distortion of-41 dBs.
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