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A new approach for 8 bit core processor & its IP design for small scale systems

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Author(s): Pulkit Trivedi, Deepak Asati

Journal: International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
ISSN 2278-1323

Volume: 1;
Issue: 7;
Start page: 121;
Date: 2012;
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Keywords: CISC | microcode | opcode | RISC | slice registers | specifier.

ABSTRACT
As we know a microprocessor is a general purpose IC which follow the instructions given to it, and the instructions set for the microprocessor designed such a way that it and handle any type of computations. Different type of architectures are available in the market like CISC, RISC, ARM etc. all of them have their own different approaches to perform computations. Our concept for this paper comes after mulling over all of these and we are proposing a new microprocessor architecture which will have CISC type instruction set (large instruction set good for multiple applications) and RISC type feature for executing every instruction in one cycle. To achieve these we just exclude few instructions (total five) of CISC. Though still we have covered all small scale and medium scale applications with our proposed architecture on cost of nothing and all sophisticated scale application on cost of extra few nanoseconds.
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