Academic Journals Database
Disseminating quality controlled scientific knowledge

Second-order sigma-delta modulator in standard cmos technology

Author(s): Milovanović Dragiša | Savić Milan | Nikolić Miljan

Journal: Serbian Journal of Electrical Engineering
ISSN 1451-4869

Volume: 1;
Issue: 3;
Start page: 37;
Date: 2004;
VIEW PDF   PDF DOWNLOAD PDF   Download PDF Original page

Keywords: analog-to-digital conversion | sigma-delta modulation

As a part of wider project sigma-delta modulator was designed. It represents an A/D part of a power meter IC. Requirements imposed were: SNDR and dynamic range > 50 dB for maximum input swing of 250 mV differential at 50 Hz. Over sampling ratio is 128 with clock frequency of 524288 Hz which gives bandwidth of 2048 Hz. Circuit is designed in 3.3 V supply standard CMOS 0.35 µm technology.
Why do you need a reservation system?      Save time & money - Smart Internet Solutions