An ASIC Architecture for Generating Optimum Mixed Polarity Reed-Muller Expression
Author(s): Mozammel H. A. Khan
Author(s): Mozammel H. A. Khan
Fast Discrete Fourier Transform Computations Using the Reduced Adder Graph Technique
Author(s): Uwe Meyer-Bäse | Hariharan Natarajan | Andrew G. Dempster
Author(s): Uwe Meyer-Bäse | Hariharan Natarajan | Andrew G. Dempster
Coupled FPGA/ASIC Implementation of Elliptic Curve Crypto-Processor
Author(s): Mohsen Machhout | Zied Guitouni | Kholdoun Torki | Lazhar Khriji | Rached Tourki
Author(s): Mohsen Machhout | Zied Guitouni | Kholdoun Torki | Lazhar Khriji | Rached Tourki
Efficient Hardware Co-Simulation of Down Convertor for Wireless Communication Systems
Author(s): Rajesh Mehra | Swapna Devi
Author(s): Rajesh Mehra | Swapna Devi
An Electronic-Nose Sensor Node Based on a Polymer-Coated Surface Acoustic Wave Array for Wireless Sensor Network Applications
Author(s): Kea-Tiong Tang | Cheng-Han Li | Shih-Wen Chiu
Author(s): Kea-Tiong Tang | Cheng-Han Li | Shih-Wen Chiu
Implementation of CT and IHT Processors for Invariant Object Recognition System
Author(s): J. Turan | L. Ovsenik | M. Benca | J. Turan jr.
Author(s): J. Turan | L. Ovsenik | M. Benca | J. Turan jr.
Implementation of a Mobile Accessible Remote Lab
Author(s): Michael E. Auer | A. Y. Al-Zoubi | Danilo Garbi Zutin
Author(s): Michael E. Auer | A. Y. Al-Zoubi | Danilo Garbi Zutin
Flexible Hardware-Based Stereo Matching
Author(s): Kristian Ambrosch | Wilfried Kubinger | Martin Humenberger | Andreas Steininger
Author(s): Kristian Ambrosch | Wilfried Kubinger | Martin Humenberger | Andreas Steininger
Development of a Three Dimensional Neural Sensing Device by a Stacking Method
Author(s): Chih-Wei Chang | Jin-Chern Chiou
Author(s): Chih-Wei Chang | Jin-Chern Chiou
An ASIC Control Circuit for Thermal Actuated Large Optical Packet Switch Array
Author(s): Jian-Chiun Liou | Fan-Gang Tseng
Author(s): Jian-Chiun Liou | Fan-Gang Tseng
專論／分類不一致之自動偵測：以農資中心資料為例／曾元顯；王峻禧 | Automatic Inconsistency Detection for the ASIC Categorization Collection / Yuen-Hsien Tseng; Chun-Shi Wang
Author(s): 曾元顯、王峻禧
Author(s): 曾元顯、王峻禧
Mechanosensor Channels in Mammalian Somatosensory Neurons
Author(s): Matthieu Raoux | Lise Rodat-Despoix | Nathalie Azorin | Aurélie Giamarchi | Jizhe Hao | François Maingret | Marcel Crest | Bertrand Coste | Patrick Delmas
Author(s): Matthieu Raoux | Lise Rodat-Despoix | Nathalie Azorin | Aurélie Giamarchi | Jizhe Hao | François Maingret | Marcel Crest | Bertrand Coste | Patrick Delmas
Design and Test of Application-Specific Integrated Circuits by use of Mobile Clients
Author(s): Danilo Garbi Zutin | Michael Auer
Author(s): Danilo Garbi Zutin | Michael Auer
Neuromorphic Configurable Architecture for Robust Motion Estimation
Author(s): Guillermo Botella | Manuel Rodríguez | Antonio García | Eduardo Ros
Author(s): Guillermo Botella | Manuel Rodríguez | Antonio García | Eduardo Ros
SmartCell: An Energy Efficient Coarse-Grained Reconfigurable Architecture for Stream-Based Applications
Author(s): Cao Liang | Xinming Huang
Author(s): Cao Liang | Xinming Huang
The Accounting Profession: Serving the Public Interest or Capital Interest?
Author(s): Mary A Kaidonis
Author(s): Mary A Kaidonis
Neuroprotective Effects of Ischemic Preconditioning on Global Brain Ischemia through Up-Regulation of Acid-Sensing Ion Channel 2a
Author(s): Yifeng Miao | Weiqiao Zhang | Yuchang Lin | Xiaojie Lu | Yongming Qiu
Author(s): Yifeng Miao | Weiqiao Zhang | Yuchang Lin | Xiaojie Lu | Yongming Qiu
AHB Compatible DDR SDRAM Controller IP Core for ARM BASED SOC
Author(s): Dr. R. Shashikumar, | C. N. Vijay Kumar, | M. Nagendrakumar, | C. S. Hemanthkumar,
Author(s): Dr. R. Shashikumar, | C. N. Vijay Kumar, | M. Nagendrakumar, | C. S. Hemanthkumar,
A Mixed-Signal Embedded Platform for Automotive Sensor Conditioning
Author(s): Emilio Volpi | Luca Fanucci | Adolfo Giambastiani | Alessandro Rocchi | Francesco D'Ascoli | Marco Tonarelli | Massimiliano Melani | Corrado Marino
Author(s): Emilio Volpi | Luca Fanucci | Adolfo Giambastiani | Alessandro Rocchi | Francesco D'Ascoli | Marco Tonarelli | Massimiliano Melani | Corrado Marino
Simulation and Emulation of MIMO Wireless Baseband Transceivers
Author(s): Pierre Greisen | Simon Haene | Andreas Burg
Author(s): Pierre Greisen | Simon Haene | Andreas Burg
A Generic Graph-Oriented Mapping Strategy for a Honeycomb Topology
Author(s): Gaurav Kumar Singh | Mythri Alle | Keshavan Vardarajan | S K Nandy | Ranjani Narayan
Author(s): Gaurav Kumar Singh | Mythri Alle | Keshavan Vardarajan | S K Nandy | Ranjani Narayan
Optimisation Of VCD Format And Test bench Reuse In Implementation Of ASIC Tester
Author(s): Wani Prakash W | Mehta Rakesh | Talware Rajendra S | Patil Ganesh C
Author(s): Wani Prakash W | Mehta Rakesh | Talware Rajendra S | Patil Ganesh C
New Class of Cryptographic Primitives and Cipher Design for Networks Security
Author(s): Nikolay Moldovyan | A. A. Moldovyan | M. A. Eremeev | N. Sklavos
Author(s): Nikolay Moldovyan | A. A. Moldovyan | M. A. Eremeev | N. Sklavos
Design of Low Power Phase Locked Loop (PLL) Using 45NM VLSI Technology
Author(s): Ujwala A. Belorkar | S.A.Ladhake
Author(s): Ujwala A. Belorkar | S.A.Ladhake
A 16-electrode Fully Integrated and Versatile CMOS Microstimulator Dedicated to Cochlear Implant
Author(s): Mohamed Ghorbel | Mounir Samet | Ahmed Ben Hamida | Jean Tomas
Author(s): Mohamed Ghorbel | Mounir Samet | Ahmed Ben Hamida | Jean Tomas
Fast Detection Anti-Collision Algorithm for RFID System Implemented On-Chip
Author(s): Jahariah Sampe | Masuri Othman
Author(s): Jahariah Sampe | Masuri Othman
High Degree of Testability Using Full Scan Chain and ATPG-An Industrial Perspective
Author(s): Mamun B.I. Reaz | Weng F. Lee | Nor H. Hamid | Hai H. Lo | Ali Y.M. Shakaff
Author(s): Mamun B.I. Reaz | Weng F. Lee | Nor H. Hamid | Hai H. Lo | Ali Y.M. Shakaff
Efficient Implementation of Sample Rate Converter
Author(s): Charanjit singh | Manjeet Singh patterh | Sanjay Sharma
Author(s): Charanjit singh | Manjeet Singh patterh | Sanjay Sharma
Amiloride Enhances Neuronal Excitability of CA1 Pyramidal Neurons in The Anesthetized Rat
Author(s): Yildirim SARA | Mert ERTUNC | Ozlem BOZDAGI | Rustu ONUR
Author(s): Yildirim SARA | Mert ERTUNC | Ozlem BOZDAGI | Rustu ONUR
Antinociception produced by Thalassia testudinum extract BM-21 is mediated by the inhibition of acid sensing ionic channels by the phenolic compound thalassiolin B
Author(s): Garateix Anoland | Salceda Emilio | Menéndez Roberto | Regalado Erik | López Omar | García Teidy | Morales Ruth | Laguna Abilio | Thomas Olivier | Soto Enrique
Author(s): Garateix Anoland | Salceda Emilio | Menéndez Roberto | Regalado Erik | López Omar | García Teidy | Morales Ruth | Laguna Abilio | Thomas Olivier | Soto Enrique
Implementation of a Synchronized Oscillator Circuit for Fast Sensing and Labeling of Image Objects
Author(s): Jacek Kowalski | Michal Strzelecki | Hyongsuk Kim
Author(s): Jacek Kowalski | Michal Strzelecki | Hyongsuk Kim
Low Power Considerations and Timing Simulation Analysis of Recent 8-Bit Embedded Controllers including AT89C5130A/31A-M-Frozen-in-Idle-State MCUs for WSN Applications
Author(s): Seema Ajay Agarkar | K.D. Kulat | R.V.Kshirsagar
Author(s): Seema Ajay Agarkar | K.D. Kulat | R.V.Kshirsagar
Implementation of Reduced Power Open Core Protocol Compliant Memory System using VHDL
Author(s): Ramesh Bhakthavatchalu | Deepthy G R
Author(s): Ramesh Bhakthavatchalu | Deepthy G R
Exploration of dual supply voltage logic synthesis in state-of-the-art ASIC design flows
Author(s): T. Mahnke | W. Stechele | M. Embacher | W. Hoeld
Author(s): T. Mahnke | W. Stechele | M. Embacher | W. Hoeld
Analytische Betrachtung des Quantisierungsfehlers bei grundlegenden Rechenoperationen der digitalen Signalverarbeitung
Author(s): W. Schlecker | C. Beuschel | H.-J. Pfleiderer
Author(s): W. Schlecker | C. Beuschel | H.-J. Pfleiderer
Design of 16-point Radix-4 Fast Fourier Transform in 0.18µm CMOS Technology
Author(s): Siva Kumar Palaniappan and Tun Zainal Azni Zulkifli
Author(s): Siva Kumar Palaniappan and Tun Zainal Azni Zulkifli
A Systematic Approach to Design Low-Power Video Codec Cores
Author(s): Kristof Denolf | Adrian Chirila-Rus | Paul Schumacher | Robert Turney | Kees Vissers | Diederik Verkest | Henk Corporaal
Author(s): Kristof Denolf | Adrian Chirila-Rus | Paul Schumacher | Robert Turney | Kees Vissers | Diederik Verkest | Henk Corporaal
Efficient Implementation of Nested-Loop Multimedia Algorithms
Author(s): Yu Hen Hu | Surin Kittitornkun
Author(s): Yu Hen Hu | Surin Kittitornkun
MODELLING AND REAL-TIME SIMULATION OF A NETWORKED-CONTROL SYSTEM WITH DISTRIBUTED LOADS
Author(s): Isizoh A. N. | Inyiama H. C. | Ezeagwu C. O. | Nwokoye A.O. C
Author(s): Isizoh A. N. | Inyiama H. C. | Ezeagwu C. O. | Nwokoye A.O. C
"ASIC Implementation of a High Speed, Low Area Reconfigurable Decimation Filter"
Author(s): Ashish Raman | Vignesh.V | Deepti Kakkar
Author(s): Ashish Raman | Vignesh.V | Deepti Kakkar
Division-Based Versus General Decomposition-Based Multiple-Level Logic Synthesis
Author(s): Frank Volf | Lech Jóźwiak | Mario Stevens
Author(s): Frank Volf | Lech Jóźwiak | Mario Stevens
Integration of SPICE with TEK LV500 ASIC Design Verification System
Author(s): A. Srivastava | S. R. Palavali
Author(s): A. Srivastava | S. R. Palavali
Design of an ASIC Chip for Skeletonization of Graylevel Digital Images
Author(s): B. Majumdar | V. V. Ramakrishna | P. S. Dey | A. K. Majumdar
Author(s): B. Majumdar | V. V. Ramakrishna | P. S. Dey | A. K. Majumdar
Estudio comparativo de los divisores en tecnologías CMOS nanométricas
Author(s): Gashaw Sassaw | Carlos J. Jiménez | José M. Mora | Manuel Valencia
Author(s): Gashaw Sassaw | Carlos J. Jiménez | José M. Mora | Manuel Valencia
VLIW BASED VEX TOOL AND VALIDATION OF SIM-A WITH VEX
Author(s): Dr. Manoj Kumar Jain | Gajendra Kumar Ranka
Author(s): Dr. Manoj Kumar Jain | Gajendra Kumar Ranka
FPGA Based Secure System Design-an Overview
Author(s): Gurjit Singh Walia | Gajraj Kuldeep | Rajiv Kapoor | A K Sharma | Navneet Gaba
Author(s): Gurjit Singh Walia | Gajraj Kuldeep | Rajiv Kapoor | A K Sharma | Navneet Gaba
Bursty Communication Performance Analysis of Network-on-Chip with Diverse Traffic Permutations
Author(s): Naveen Choudhary
Author(s): Naveen Choudhary
A Systematic Approach to Design Low-Power Video Codec Cores
Author(s): Denolf Kristof | Chirila-Rus Adrian | Schumacher Paul | Turney Robert | Vissers Kees | Verkest Diederik | Corporaal Henk
Author(s): Denolf Kristof | Chirila-Rus Adrian | Schumacher Paul | Turney Robert | Vissers Kees | Verkest Diederik | Corporaal Henk
SmartCell: An Energy Efficient Coarse-Grained Reconfigurable Architecture for Stream-Based Applications
Author(s): Liang Cao | Huang Xinming
Author(s): Liang Cao | Huang Xinming
Efficient Implementation of Nested-Loop Multimedia Algorithms
Author(s): Kittitornkun Surin | Hu YuHen
Author(s): Kittitornkun Surin | Hu YuHen
Simulation and Emulation of MIMO Wireless Baseband Transceivers
Author(s): Greisen Pierre | Haene Simon | Burg Andreas
Author(s): Greisen Pierre | Haene Simon | Burg Andreas
Fast Discrete Fourier Transform Computations Using the Reduced Adder Graph Technique
Author(s): Meyer-Bäse Uwe | Natarajan Hariharan | Dempster Andrew G
Author(s): Meyer-Bäse Uwe | Natarajan Hariharan | Dempster Andrew G
Flexible Hardware-Based Stereo Matching
Author(s): Ambrosch Kristian | Kubinger Wilfried | Humenberger Martin | Steininger Andreas
Author(s): Ambrosch Kristian | Kubinger Wilfried | Humenberger Martin | Steininger Andreas
A Mixed-Signal Embedded Platform for Automotive Sensor Conditioning
Author(s): Volpi Emilio | Fanucci Luca | Giambastiani Adolfo | Rocchi Alessandro | D'Ascoli Francesco | Tonarelli Marco | Melani Massimiliano | Marino Corrado
Author(s): Volpi Emilio | Fanucci Luca | Giambastiani Adolfo | Rocchi Alessandro | D'Ascoli Francesco | Tonarelli Marco | Melani Massimiliano | Marino Corrado
LOW NOISE LOW POWER READOUT CIRCUIT FOR SOFT X RAY DETECTION
Author(s): A. Cerdeira-Estrada | A. De Luca | A. Cuttin | R. Mutihac
Author(s): A. Cerdeira-Estrada | A. De Luca | A. Cuttin | R. Mutihac
Operator Design Methodology and Application in H.264 Entropy Coding
Author(s): Ziyi Hu | Teng Wang | Kuilin Chen | Zheng Xie | Xin'an Wang
Author(s): Ziyi Hu | Teng Wang | Kuilin Chen | Zheng Xie | Xin'an Wang
A SMART CAMERA PROCESSING PIPELINE FOR IMAGE APPLICATIONS UTILIZING MARCHING PIXELS
Author(s): Michael Schmidt | Marc Reichenbach | Andreas Loos | Dietmar Fey
Author(s): Michael Schmidt | Marc Reichenbach | Andreas Loos | Dietmar Fey
Area Efficient Design of Routing Node for Network-on-Chip
Author(s): Rehan Maroofi | Vilas Nitnaware | Shyam Limaye
Author(s): Rehan Maroofi | Vilas Nitnaware | Shyam Limaye
交流接触器节能专用芯片的设计与实现 Design and Implementation of an Energy Saver IC for AC Contactor
Author(s): 丁晨 | 韩雁 | 彭成 | 范镇淇 | 郭行干
Author(s): 丁晨 | 韩雁 | 彭成 | 范镇淇 | 郭行干
Efficient DPA Attacks on AES Hardware Implementations
Author(s): Yu HAN | Xuecheng ZOU | Zhenglin LIU | Yicheng CHEN
Author(s): Yu HAN | Xuecheng ZOU | Zhenglin LIU | Yicheng CHEN
Comparative study of Braun’s Multiplier Using FPGA Devices
Author(s): Anitha R, | Bagyaveereswaran V
Author(s): Anitha R, | Bagyaveereswaran V
A Novel Hardware Efficient Reconfigurable 32-Bit Arithmetic Unit for Binary, BCD and Floating Point Operands
Author(s): Mohit Tyagi, | Kavita Khare
Author(s): Mohit Tyagi, | Kavita Khare
VLSI Implementation of Novel Class of High Speed Pipelined Digital Signal Processing Filter for Wireless Receivers
Author(s): Rozita Teymourzadeh | Yazan S. Algnabi | Masuri Othman | Md S. Islam | Jimmy M.V. Hong
Author(s): Rozita Teymourzadeh | Yazan S. Algnabi | Masuri Othman | Md S. Islam | Jimmy M.V. Hong
Digital Hardware Implementation of a Neural System Used for Nonlinear Adaptive Prediction
Author(s): Hassène Faiedh | Chokri Souani | Kholdoun Torki | Kamel Besbes
Author(s): Hassène Faiedh | Chokri Souani | Kholdoun Torki | Kamel Besbes
