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Clock Synchronization in Wireless Sensor Networks: An Overview

Author(s): Ill-Keun Rhee | Jaehan Lee | Jangsub Kim | Erchin Serpedin | Yik-Chung Wu
Discrete Phase-Locked Loop Systems and Spreadsheets

Author(s): Sergei Abramovich | Elena Kudryashova | Gennady A. Leonov | Steve Sugden
The Design of Serial ATA Bus Control Chip

Author(s): Wei Cheng | Zhenghua Tan | Zhiliang Zhu | Guiran Chang
A New Method to Minimize the Clock Skew to Enhance Performance of Digital System

Author(s): N. Suresh Kumar, | J. Anitha | M.S.S. Praveen, | N. Asok Kumar, | R. Ajay Suresh Babu
Post-CTS Delay Insertion

Author(s): Jianchao Lu | Baris Taskin
Design and implementation of an Asynchronous Controller for FPGA Based Asynchronous Systems

Author(s): T.N.Prabakar | G. Lakshminarayanan | K.K.Anilkumar
Fast Clock Tree Generation Using Exact Zero Skew Clock Routing Algorithm

Author(s): M.B.I. Reaz | M.I. Ibrahimy | N. Amin
VLSI Implementation of Hybrid Wave-Pipelined 2D DWT Using Lifting Scheme

Author(s): G. Seetharaman | B. Venkataramani | G. Lakshminarayanan
A Comparative Study of SynchronousClocking Schemes for VLSI Based Systems

Author(s): Ahmed El-Amawy | Umasankar Maheshwar
Synchronization of Integrated Systems on a Chip

Author(s): Linares-Aranda M. | González-Díaz O. | Salim-Maza M
Pulse width control loop as a duty cycle corrector

Author(s): Jovanović Goran | Stojčev Mile K.
Effect of Interrupt Logic on Delay Balancing Circuit

Author(s): N. Suresh Kumar | D.V. Rama Koti Reddy
Low Power Clock Network Design

Author(s): Inna Vaisband | Eby G. Friedman | Ran Ginosar | Avinoam Kolodny
Clocking in Multi-GHz Environment

Author(s): Vojin G. Oklobdžija
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