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Design of a Clap Activated Switch

Author(s): Seyi Stephen OLOKEDE
Design and Construction of a Remote Controlled Power Supply Unit

Author(s): Mahmud Shehu AHMED | Murtala B. Z. ADAMU | Jonathan G. KOLO
The State Space Mystery with Negative Load in Multiple-Valued Logic

Author(s): P. Galajda | M. Guzan | V. Spany
Neural network model of the lateral accessory lobe and ventral protocerebrum of Bombyx mori to generate the flip-flop activity

Author(s): Nishikawa Ikuko | Nakaumura Masayoshi | Igarashi Yoshiki | Kazawa Tomoki | Ikeno Hidetoshi | Kanzaki Ryohei
Rupture Pathway of Phosphatidylcholine Liposomes on Silicon Dioxide

Author(s): Erik Reimhult | Bengt Kasemo | Fredrik Höök
A New All-Optical Switching Node Including Virtual Memory and Synchronizer

Author(s): Selma Batti | Mourad Zghal | Noureddine Boudriga
Ethyl 4-(2,4-difluorophenyl)-6-methyl-1-phenyl-2-thioxo-1,2,3,4-tetrahydropyrimidine-5-carboxylate

Author(s): Hoong-Kun Fun | Samuel Robinson Jebas | M. Babu | B. Kalluraya
Analyse und Entwurf von hochbitratigen Clock-and-Data-Recovery Schaltungen in CMOS-Technologie

Author(s): J.-K. Bremer | C. Zemko | J. Schmackers | W. Mathis
Function Approximation Performance of Fuzzy Neural Networks

Author(s): Rita Lovassy | László T. Kóczy | László Gál
ALL OPTICAL 3-BIT SERIAL INPUT SHIFT REGISTER DESIGN

Author(s): VIKRANT K SRIVASTAVA, | DEVENDRA CHACK, | VISHNU PRIYE
SPM Response of a Distributed coupling coefficient DFB-SOA All-Optical Flip-Flop

Author(s): M. Jabbari | M. K. Moravvej Farshi | Reza Ghayour | Ali Zarifkar
Power Consumption and BER of Flip-Flop Inserted Global Interconnect

Author(s): Jingye Xu | Abinash Roy | Masud H. Chowdhury
Variation-Tolerant and Low-Power Source-Synchronous Multicycle On-Chip Interconnect Scheme

Author(s): Maged Ghoneima | Yehea Ismail | Muhammad Khellah | Vivek De
On-Chip All-Optical Switching and Memory by Silicon Photonic Crystal Nanocavities

Author(s): Masaya Notomi | Takasumi Tanabe | Akihiko Shinya | Eiichi Kuramochi | Hideaki Taniyama
Design of Reversible Sequential Circuit Using Reversible Logic Synthesis

Author(s): Md. Belayet Ali | Md. Mosharof Hossin | Md. Eneyat Ullah
Optimized Design of 2D Mesh NOC Router using Custom SRAM & Common Buffer Utilization

Author(s): Bhavana Pote | V. N. Nitnaware | S. S. Limaye
ALL-OPTICAL BINARY COUNTER BY USING T FLIP-FLOP: AN IMPLEMENTATION

Author(s): SAMIR SAHU | RADHA RAMAN PAL | SHANTANU DHAR
Clocking in Multi-GHz Environment

Author(s): Vojin G. Oklobdžija
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