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Control an Electromechanical System in the Real-Time Linux Environment

Author(s): Matej Dobšovič | Martin Kratmüller
Diseño de un banco de pruebas para regeneradores térmicos

Author(s): LAURA CATALINA VILLA SILVA | RICARDO MEJÍA ÁLVAREZ | JHON RAMIRO AGUDELO
Application Oriented Analysis of NISC Architecture

Author(s): SADHNA K.MISHRA, | ARVIND RAJAWAT, | R.P. SINGH
Multiple Word-Length High-Level Synthesis

Author(s): Philippe Coussy | Ghizlane Lhairech-Lebreton | Dominique Heller
Implementation and Evaluation of Power Consumption of an Iris Pre-processing Algorithm on Modern FPGA

Author(s): H. Blasinsky | F. Amiel | T. Ea | F. Rossant | B. Mikovicova
BDD-based Verification of Scalable Designs

Author(s): Daniel Große | Rolf Drechsler
Software Toolchain for Large-Scale RE-NFA Construction on FPGA

Author(s): Yi-Hua E. Yang | Viktor K. Prasanna
The New Embedded System Design Methodology For Improving Design Process Performance

Author(s): Maman Abdurohman | Kuspriyanto | Sarwono Sutikno | Arif Sasongko
Optimisation Of VCD Format And Test bench Reuse In Implementation Of ASIC Tester

Author(s): Wani Prakash W | Mehta Rakesh | Talware Rajendra S | Patil Ganesh C
High Degree of Testability Using Full Scan Chain and ATPG-An Industrial Perspective

Author(s): Mamun B.I. Reaz | Weng F. Lee | Nor H. Hamid | Hai H. Lo | Ali Y.M. Shakaff
Characterization of human platelet binding of recombinant T cell receptor ligand

Author(s): Itakura Asako | Aslan Joseph | Sinha Sushmita | White-Adams Tara | Patel Ishan | Meza-Romero Roberto | Vandenbark Arthur | Burrows Gregory | Offner Halina | McCarty Owen
Comparative analysis of two electronic apex locators in working length determination at endodontic therapy: an in vitro study

Author(s): Kenner Bruno Miguita | Rodrigo Sanches Cunha | Felipe Davini | Carlos Eduardo Fontana | Carlos Eduardo da Silveira Bueno
A Systematic Approach to Design Low-Power Video Codec Cores

Author(s): Kristof Denolf | Adrian Chirila-Rus | Paul Schumacher | Robert Turney | Kees Vissers | Diederik Verkest | Henk Corporaal
Exploiting Process Locality of Reference in RTL Simulation Acceleration

Author(s): Aric D. Blumer | Cameron D. Patterson
MODULACIÓN DE SEÑALES BINARIAS POR POSICIÓN DE PULSO EN DISPOSITIVOS FPGA

Author(s): DORA MAR A BALLESTEROS | PAULINE GAMMA | WILLINGTON CAMACHO
Technical Study on Low Power VLSI methods

Author(s): T.Kapilachander | I.Hameem Shanavas | V.Venkataraman
Design Methods for Low-Power Implementation

Author(s): N. A. Mohota | T. N. Mohota
Design of Open Core Protocol

Author(s): NayabRasool Shaik | Srikanth Pothula
A Systematic Approach to Design Low-Power Video Codec Cores

Author(s): Denolf Kristof | Chirila-Rus Adrian | Schumacher Paul | Turney Robert | Vissers Kees | Verkest Diederik | Corporaal Henk
Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems

Author(s): Zergainoh Nacer-Eddine | Tambour Ludovic | Urard Pascal | Jerraya Ahmed Amine
Multiple Word-Length High-Level Synthesis

Author(s): Coussy Philippe | Lhairech-Lebreton Ghizlane | Heller Dominique
An Quadrant-XYZ routing algorithm for 3-D Asymmetric Torus Network-on-Chip

Author(s): Mohammad Ayoub Khan | Abdul Quaiyum Ansari Ansari
A 16-Bit Fully Functional Single Cycle Processor

Author(s): Nidhi Maheshwari | Pramod Kumar Jain | D.S. Ajnar
Defect-Oriented Mixed-Level Fault Simulation in Digital Systems

Author(s): Raimund Ubar | Jaan Raik | Eero Ivask | Marina Brik
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