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Author(s): Jozef Cuntala | Peter Sindler | Anna Kondelova

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Author(s): Roberto Marani | Gennaro Gelao | Anna Gina Perri

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Author(s): Richa Sinha | Akhilesh Kumar | Archana Kumari Sinha

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Author(s): Rishabh Singh Kurmi | Shruti Bhargava | Ajay Somkuwar

Latency Performance of Chordal Ring Perfect Difference Network Topology for Network on Chip Architecture using NS2

Author(s): Mahendra Gaikwad | Rajendra Patrikar | Abhay Gandhi

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Author(s): P.K. Suri | Sandeep Kumar | Gurdev Singh

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Author(s): Muhammad Adeel Akram | Aamir Khan | Muhammad Masood Sarfaraz

Efficient Switching Activity Reduction Technique for Fault Tolerant Data Bus

Author(s): A. Sathish | Dr. M. Madhavi Latha | Dr. K. Lal Kishore

A Novel Methodology for Thermal Aware Silicon Area Estimation for 2D & 3D MPSoCs

Author(s): Ramya Menon C. | Vinod Pangracious

Design of Low Write-Power Consumption SRAM Cell Based on CNTFET at 32nm Technology

Author(s): Rajendra Prasad S | B K Madhavi | K Lal Kishore

Optimized Design of 2D Mesh NOC Router using Custom SRAM & Common Buffer Utilization

Author(s): Bhavana Pote | V. N. Nitnaware | S. S. Limaye

Sheathless Size-Based Acoustic Particle Separation

Author(s): Rasim Guldiken | Myeong Chan Jo | Nathan D. Gallant | Utkan Demirci | Jiang Zhe

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Author(s): Dr. Manoj Kumar Jain | Gajendra Kumar Ranka

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Author(s): Zhang Bo | Zhang Gang

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Author(s): Mohini Ratna Chaurasia | Nitin Naiyar

Technical Aspects of New Concentrating Solar Thermomechanic Conversion Technical Aspects of New Concentrating Solar Thermomechanic Conversion

Author(s): Ivan Herec | Zdenek Dostal | Jan Zupa | Stefan Gresik

The New Implementation Possibilities for Electronic Logical Devices

Author(s): Jozef Cuntala | Peter Sindler | Anna Kondelova

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Author(s): Naveen Choudhary

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Author(s): María D. Jaraíz-Simón | Juan A. Gómez-Pulido | Miguel A. Vega-Rodríguez | Juan M. Sánchez-Pérez

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Author(s): Francisco Barranco | Javier Diaz | Agostino Gibaldi | Silvio P. Sabatini | Eduardo Ros

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Author(s): Alfredo Gardel | Pablo Montejo | Jorge García | Ignacio Bravo | José L. Lázaro

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CASPER: Embedding Power Estimation and Hardware-Controlled Power Management in a Cycle-Accurate Micro-Architecture Simulation Platform for Many-Core Multi-Threading Heterogeneous Processors

Author(s): Kushal Datta | Arindam Mukherjee | Guangyi Cao | Rohith Tenneti | Vinay Vijendra Kumar Lakshmi | Arun Ravindran | Bharat S. Joshi

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Author(s): CRISTEA, D. G. | BASCH, M. E. | BEN-YOAV, H. | TIPONUT, V. | SHACHAM-DIAMAND, Y.

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Author(s): Paulo J. Cordeiro | Pedro Assunção

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Author(s): Shafi Patel | Parag Parandkar | Sumant Katiyal | Ankit Agrawal

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Author(s): Parag Parandkar | Jayesh kumar Dalal | Sumant Katiyal

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Author(s): Amit Kumar Panda | Praveena Rajput | Bhawna Shukla

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Author(s): Petr Sodomka | Hana Klčová | Lukáš Petrucha

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Author(s): Christophe Desmouliers | Fernando M. Vallina | Jafar Saniie | Erdal Oruklu | Richard Hanley | Semih Aslan

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Author(s): Wajdi Elhamzi | Rached Tourki | Mohamed Atri | Fatma Sayadi

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Author(s): T.Kapilachander | I.Hameem Shanavas | V.Venkataraman

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Author(s): Chandrakant Ragit | Sanjay Badjate

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Author(s): N. A. Mohota | T. N. Mohota

Analyzing Methodologies of Irregular NoC Topology Synthesis

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Performance Evaluation of Traffic Permutations for Mesh On-Chip Networks

Author(s): Naveen Choudhary | Dharm Singh | Abhilasha Sharma

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Author(s): Shue Wang | Wenfeng Liang | Zaili Dong | Vincent G. B. Lee | Wen J. Li

Configuration of FPGA For Computerized Speech/Sound Processing For Bio-Computing Systems

Author(s): V. Hanuman Kumar | P. Seetha Ramaiah

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Author(s): K.Bala Souri | K.Hima Bindu | K.V. Ramana Rao

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Author(s): SRIKANTH POTHULA | SK NAYAB RASOOL

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Author(s): NayabRasool Shaik | Srikanth Pothula

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Author(s): F.R. Castillo–Soria | D. Pacheco–Bautista | M. Sánchez–Meraz

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Author(s): Mohammad Behrouzian Nejad | Amin Mehranzadeh | Mehdi Hoodgar

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Author(s): E. Raja | K.V. Ramana

System-Level Biochip for Impedance Sensing and Programmable Manipulation of Bladder Cancer Cells

Author(s): Cheng-Hsin Chuang | Yao-Wei Huang | Yao-Tung Wu

Embedded nanomicro syringe on chip for molecular therapy

Author(s): Jalil MA | Suwanpayak N | Kulsirirat K | Suttirak S | Ali J | Yupapin PP

Biocompatible micro-sized cell culture chamber for the detection of nanoparticle-induced IL8 promoter activity on a small cell population

Author(s): Kohl Yvonne | Oostingh Gertie | Sossalla Adam | Duschl Albert | von Briesen Hagen | Thielecke Hagen

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Author(s): Yeh Chi-Tsai | Wang Chun-Hao | Huang Ing-Jer | Wong Weng-Fai

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Author(s): Masselos K | Voros NS

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Author(s): Fürtler Johannes | Mayer KonradJ | Eckel Christian | Brodersen Jörg | Nachtnebel Herbert | Cadek Gerhard

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Author(s): Kearney David | Jasiunas Mark

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Author(s): Chalimbaud Pierre | Berry François

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Author(s): Glossner John | Iancu Daniel | Moudgill Mayan | Nacer Gary | Jinturkar Sanjay | Stanley Stuart | Schulte Michael

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Author(s): Duraisamy Roshan | Salcic Zoran | Strangio MaurizioAdriano | Morales-Sandoval Miguel

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Author(s): Verdoolaege Sven | Nikolov Hristo | Stefanov Todor

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Author(s): Kukkala Petri | Setälä Mikko | Arpinen Tero | Salminen Erno | Hännikäinen Marko | Hämäläinen TimoD

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Author(s): Kulmala Ari | Lehtoranta Olli | Hämäläinen TimoD | Hännikäinen Marko

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Author(s): Ben Mouhoub Riad | Hammami Omar

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Author(s): Evain Samuel | Diguet Jean-Philippe | Houzet Dominique

Speech Silicon: An FPGA Architecture for Real-Time Hidden Markov-Model-Based Speech Recognition

Author(s): Schuster Jeffrey | Gupta Kshitij | Hoare Raymond | Jones AlexK

SmartCell: An Energy Efficient Coarse-Grained Reconfigurable Architecture for Stream-Based Applications

Author(s): Liang Cao | Huang Xinming

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Author(s): Arpinen Tero | Salminen Erno | Hämäläinen TimoD | Hännikäinen Marko

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Author(s): Simard Stéphane | Mailloux Jean-Gabriel | Beguenane Rachid

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Author(s): Ttofis Christos | Papadopoulos Agathoklis | Theocharides Theocharis | Michael MariaK | Doumenis Demosthenes

VLSI Design of a Variable-Length FFT/IFFT Processor for OFDM-Based Communication Systems

Author(s): Kuo Jen-Chih | Wen Ching-Hua | Lin Chih-Hsiu | Wu An-Yeu (Andy)

Design and Realization of a New Signal Security System for Multimedia Data Transmission

Author(s): Chen Hun-Chen | Guo Jiun-In | Huang Lin-Chieh | Yen Jui-Cheng

An Analogue VLSI Implementation of the Meddis Inner Hair Cell Model

Author(s): McEwan Alistair | van Schaik André

A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems

Author(s): Tanougast Camel | Berviller Yves | Weber Serge | Brunet Philippe

Blind Multiuser Detection for Long-Code CDMA Systems with Transmission-Induced Cyclostationarity

Author(s): Li Tongtong | Liang Weiguo | Ding Zhi | Tugnait Jitendra K

Differential Amplitude Pulse-Position Modulation for Indoor Wireless Optical Communications

Author(s): Sethakaset Ubolthip | Gulliver T Aaron

Noise and Spurious Tones Management Techniques for Multi-GHz RF-CMOS Frequency Synthesizers Operating in Large Mixed Analog-Digital SOCs

Author(s): Maxim Adrian

High-Performance Wireless via the Merger of CI Chip-Shaped DS-CDMA and Oscillating-Beam Smart Antenna Arrays

Author(s): Zekavat Seyed Alireza | Nassar Carl R | Shattil Steve

Embedded Real-Time Architecture for Level-Set-Based Active Contours

Author(s): Dejnožková Eva | Dokládal Petr

A Consistent Design Methodology for Wireless Embedded Systems

Author(s): Belanović P | Knerr B | Holzer M | Sauzon G | Rupp M

Multimedia Terminal System-on-Chip Design and Simulation

Author(s): Barbieri Ivano | Bariani Massimo | Scotto Alessandro | Raggio Marco

Object Recognition System-on-Chip Using the Support Vector Machines

Author(s): Reyna-Rojas Roberto | Houzet Dominique | Dragomirescu Daniela | Carlier Florent | Ouadjaout Salim

Multichannel Baseband Processor for Wideband CDMA

Author(s): Jalloul Louay MA | Lin Jim

A Low-Cost Time-Hopping Impulse Radio System for High Data Rate Transmission

Author(s): Molisch Andreas F | Li Ye Geoffrey | Nakache Yves-Paul | Orlik Philip | Miyake Makoto | Wu Yunnan | Gezici Sinan | Sheng Harry | Kung SY | Kobayashi H | Poor H Vincent | Haimovich Alexander | Zhang Jinyun

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Author(s): Hu Chia-Chang

Prototyping Neuroadaptive Smart Antenna for 3G Wireless Communications

Author(s): To William | Salcic Zoran | Nguang Sing Kiong

An FPGA-Based People Detection System

Author(s): Nair Vinod | Laprise Pierre-Olivier | Clark James J

An Improved Overloading Scheme for Downlink CDMA

Author(s): Vanhaverbeke Frederik | Moeneclaey Marc

Towards Low-Power On-chip Auditory Processing

Author(s): Ravindran Sourabh | Smith Paul | Graham David | Duangudom Varinthira | Anderson David V | Hasler Paul

FPGA Implementation of an MUD Based on Cascade Filters for a WCDMA System

Author(s): Ho Quoc-Thai | Massicotte Daniel | Dahmane Adel-Omar

Iterative Pilot-Layer Aided Channel Estimation with Emphasis on Interleave-Division Multiple Access Systems

Author(s): Schoeneich Hendrik | Hoeher Peter Adam

3D-SoftChip: A Novel Architecture for Next-Generation Adaptive Computing Systems

Author(s): Kim Chul | Rassau Alex | Lachowicz Stefan | Lee Mike Myung-Ok | Eshraghian Kamran

Self-Timed Scheduling Analysis for Real-Time Applications

Author(s): Moreira Orlando M | Bekooij Marco JG

Multiple Word-Length High-Level Synthesis

Author(s): Coussy Philippe | Lhairech-Lebreton Ghizlane | Heller Dominique

SoC Design Approach Using Convertibility Verification

Author(s): Sinha Roopak | Roop ParthaS | Basu Samik

Using High-Level RTOS Models for HW/SW Embedded Architecture Exploration: Case Study on Mobile Robotic Vision

Author(s): Verdier François | Miramond Benoît | Maillard Mickaël | Huck Emmanuel | Lefebvre Thomas

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Author(s): Kreku Jari | Hoppari Mika | Kestilä Tuomo | Qu Yang | Soininen Juha-Pekka | Andersson Per | Tiensyrjä Kari

High Speed 3D Tomography on CPU, GPU, and FPGA

Author(s): GAC Nicolas | Mancini Stéphane | Desvignes Michel | Houzet Dominique

An SIMD Programmable Vision Chip with High-Speed Focal Plane Image Processing

Author(s): Ginhac Dominique | Dubois Jérôme | Paindavoine Michel | Heyrman Barthélémy

Stream Execution on Embedded Wide-Issue Clustered VLIW Architectures

Author(s): Yan Shan | Lin Bill

System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design

Author(s): Dömer Rainer | Gerstlauer Andreas | Peng Junyu | Shin Dongwan | Cai Lukai | Yu Haobo | Abdi Samar | Gajski DanielD

FPSoC-Based Architecture for a Fast Motion Estimation Algorithm in H.264/AVC

Author(s): Ndili Obianuju | Ogunfunmi Tokunbo

Hardware-Enabled Dynamic Resource Allocation for Manycore Systems Using Bidding-Based System Feedback

Author(s): Theocharides Theocharis | Michael MariaK | Polycarpou Marios | Dingankar Ajit

Trade-Off Exploration for Target Tracking Application in a Customized Multiprocessor Architecture

Author(s): Khan Jehangir | Niar Smail | Saghir MazenAR | El-Hillali Yassin | Rivenq-Menhaj Atika

A Model-Driven Approach for Hybrid Power Estimation in Embedded Systems Design

Author(s): Trabelsi Chiraz | Ben Atitallah Rabie | Meftali Samy | Dekeyser Jean-Luc | Jemai Abderrazek

A Heterogeneous System-level Power Macro-modeling for Network-on-Chip Router

Author(s): Ning Wu | Fang Zhou | Fen Ge | Yifeng Mu

Interoperation of an UHF RFID Reader and a TCP/IP Device via Wired and Wireless Links

Author(s): Sang Hoon Lee | Ik Soo Jin

A Supramolecular Sensing Platform for Phosphate Anions and an Anthrax Biomarker in a Microfluidic Device

Author(s): Bilge Eker | Mahmut Deniz Yilmaz | Stefan Schlautmann | Johannes G. E. Gardeniers | Jurriaan Huskens

A Conductometric Indium Oxide Semiconducting Nanoparticle Enzymatic Biosensor Array

Author(s): Dongjin Lee | Janet Ondrake | Tianhong Cui

A Frequency Estimation for TD-SCDMA UE Based on Phase Difference

Author(s): Ren-Ming Peng | Zheng-Tong. Hao | Yang. Mei

Design of Field Irrigation Multi-purpose Control Device Based on Idle Work Compensation

Author(s): Liang Zhang | Jishun Jiang | Lina Liu

AREA-EFFICIENT DESIGN OF SCHEDULER FOR ROUTING NODE OF NETWORK-ON-CHIP

Author(s): Rehan Maroofi | V. N. Nitnaware | S. S. Limaye

Energy, Throughput and Area Evaluation of Regular and Irregular Network on Chip Architectures

Author(s): 1Umamaheswari S | Rajapaul Perinbam J

Network on Chip: a New Approach of QoS Metric Modeling Based on Calculus Theory

Author(s): Salem NASRI

PLL Design and Investigation in CMOS Fazės derinimo kilpos integrinio grandyno projektavimas ir tyrimas

Author(s): Jevgenij Charlamov

User Behavior Information and Diffusion Process for IC-Card System

Author(s): Donghun Yoon

An Integrated Mobile Phone Payment System Based on 3G Network

Author(s): Weihui Dai | Xiang Cai | Haifeng Wu | Weidong Zhao | Xuan Li

Impact of GVD and SPM on the Performance of DS-OCDMA

Author(s): Md. Jahedul Islam | Md. Rafiqul Islam

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A New Test Data Compression Scheme

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Design of LED Display Control System Based on AT89C52 Single Chip Microcomputer

Author(s): Yongxian Song | Yuan Feng | Juanli Ma | Xianjin Zhang

Efficient Phase Unwrapping Architecture for Digital Holographic Microscopy

Author(s): Wen-Jyi Hwang | Shih-Chang Cheng | Chau-Jern Cheng

Low Power Address Generator for Memory Built-In Self Test

Author(s): Ahmed N. Awad | Abdallatif S.Abu-Issa

Constructing gene regulatory networks for long term photosynthetic light acclimation in Arabidopsis thaliana

Author(s): Yao Cheng-Wei | Hsu Ban-Dar | Chen Bor-Sen

A High-level Synthesis Design Flow from ESL to RTL with Multi-parametric Optimization Objective

Author(s): Sedaghat Reza | Sengupta Anirban

Smart Integrated Sensor for Multiple Detections of Glucose and L-Lactate Using On-Chip Electrochemical System

Author(s): Tomoyuki Yamazaki | Takaaki Ikeda | Byounghyun Lim | Koichi Okumura | Makoto Ishida | Kazuaki Sawada

A Technique to Reduce Transition Energy for Data-Bus in DSM Technology

Author(s): A Sathish | M. Madhavi Latha | K Lalkishor

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Address Counter Generators for Low Power Memory BIST

Author(s): Balwinder Singh | Sukhleen Bindra Narang | Arun Khosla

A Novel System-Level Methodology for the Design and Implementation of Multiplexed Master-Slave System-on-Chip Components using Object-Oriented Patterns

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Field Programmable Gate Array Based Parallel Strapdown Algorithm Design for Strapdown Inertial Navigation Systems

Author(s): Zong-Tao Li | Tie-Jun Wu | Can-Long Lin | Long-Hua Ma

Hierarchical Agent Based NoC with DVFS Techniques

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Transcription factors Sp1 and Sp4 regulate TRPV1 gene expression in rat sensory neurons

Author(s): Chu Catherine | Zavala Kathryn | Fahimi Atefeh | Lee Jessica | Xue Qing | Eilers Helge | Schumacher Mark

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Author(s): Kaneko Tomoyuki | Nomura Fumimasa | Yasuda Kenji

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