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FPGA Implementation of Intelligent Climate Control for Greenhouse

Author(s): Dhananjay E. Upasani | Sandip B. Shrote | Vrushali P. Wani
Efficient Implementation of a Scalable Encryption Algorithm using FPGA

Author(s): B. Praveen Kumar | P. Ezhumalai | Dr. S. Sankara Gomathi
Design of COFDM Transceiver Using VHDL

Author(s): Hemant Kumar Sharma | Sanjay P. Sood | Balwinder Singh
Design of Belief Propagation Based on FPGA for the Multistereo CAFADIS Camera

Author(s): Eduardo Magdaleno | Jonás Philipp Lüke | Manuel Rodríguez | José Manuel Rodríguez-Ramos
Design and VLSI implementation of Fuzzy Logic Controller

Author(s): Balwinder Singh , Rajneesh Goyal , Rakesh Kumar and R.P.P Singh
Design and Optimization of Medium Access Control Protocol of IEEE 802.3 Transmitter with VHDL

Author(s): Puran Gour | Ravi Shankar Mishra | Saima Khan | Rajesh Nema
IMPLEMENTATION OF DIGITAL QPSK MODULATOR BY USING VHDL / MATLAB

Author(s): Teena Sakla, | Divya Jain | Sandhya Gautam
FPGA Implementation of RSA Encryption System

Author(s): Sushanta Kumar Sahu | Manoranjan Pradhan
An Implementation of I2C using VHDL for DATA surveillance

Author(s): Arvind Sahu, | Dr. Ravi Shankar Mishra, | Puran Gour
On VHDL Synthesis of Self-Checking Two-Level Combinational Circuits

Author(s): Tatjana R. Stanković | Mile K. Stojčev | Goran Lj. Djordjević
Generic Reed Solomon Encorder

Author(s): Petrus Mursanto
Improved Carry Select Adder with Reduced Area and Low Power Consumption

Author(s): Padma Devi | Ashima Girdher | Balwinder Singh
VHDL Implementation of Multiplierless, High Performance DWT Filter Bank

Author(s): Mr. M.M. Aswale | Prof. Ms. R.B Patil
Design & Implementation of JPEG2000 Encoder using VHDL

Author(s): Kanchan H. Wagh | Pravin K. Dakhole | Vinod G. Adhau
Power Optimized Programmable Embedded Controller

Author(s): M.Kamaraju | K.Lalkishore | A.V.N.Tilak
Serial ALU Simulation with Timing and Signal Constraints

Author(s): Muhammad Kamran | Shi Feng | Sana Qureshi
VHDL-based programming environment for Floating-Gate analog memory cell

Author(s): Fernando Cardoso Castaldo | Carlos Alberto dos Reis Filho
A Design of fuzzy controller for Autonomous Navigation of Unmanned Vehicle

Author(s): Vinod Kapse | DR B JHARIA | DR S S THAKUR
FPGA Based Kalman Filter for Wireless Sensor Networks

Author(s): Vikrant Vij | Rajesh Mehra
Implementation of SVPWM in FPGA through MATLAB/SIMULNK Environment

Author(s): PRAWIN ANGEL MICHAEL, | K.VINOTH KUMAR, | K.KISHORE REDDY, | S.SURESH KUMAR | N.DEVARAJAN
Statistical Timing Analysis of Asynchronous Circuits Using Logic Simulator

Author(s): Miljana Lj. Sokolović | Vančo B. Litovski
Hardware Implementation of Hybrid Dynamic Voltage Scaling

Author(s): R. Seshasayanan | S.K. Srivatsa
Power Efficient Multilayer Neural Network for Image Compression

Author(s): K. Venkata Ramanaiah | K. Lal Kishore | P. Gopal Reddy
Virtual Prototyping in Power Electronics Using VHDL-AMS Application to the Direct Torque Control Optimisation

Author(s): Ahmed Fakhfakh | Salima Feki | Yannick Herve | Abdelmajid Walha | Nouri Masmoudi
Novel Design of Fast RBSD Adder with Reduced NOR-NOR Logic

Author(s): Rakesh Kumar Saxena, Neelam Sharma and A. K. Wadhwani
High Speed and Low Space Complexity FPGA Based ECC Processor

Author(s): Rahila Bilal | Dr.M.Rajaram
Implementation of Low Power Scalable Encryption Algorithm

Author(s): K.J. Jegadish Kumar | S. Salivahanan | K. Chenna Kesava Reddy
Novel and Efficient Cellular Automata Based Symmetric Key Encryption Algorithm for Wireless Sensor Networks

Author(s): K.J. Jegadish Kumar | K. Chenna Kesava Reddy | S. Salivahanan
Hardware Implementation of Efficient Modified Karatsuba Multiplier Used in Elliptic Curves

Author(s): Sameh M. Shohdy | Ashraf B. El-Sisi | Nabil Ismail
Reconfigurable Hardware Intelligent Memory Controller for H.264/AVC Encoders

Author(s): Kamel Messaoudi | El-Bay Bourennane | Salah Toumi
HIGH SPEED POINT ARITHMETIC ARCHITECTURE FOR ECC ON FPGA

Author(s): Rahila Bilal, | Dr.M.Rajaram
Efficient Hardware Design and Implementation of AES Cryptosystem

Author(s): Pravin B. Ghewari | Mrs. Jaymala K. Patil | Amit B. Chougule
FPGA Implementation of NLMS Algorithm for Identification of unknown system

Author(s): K. R. Rekha, | Dr B. S. Nagabushan, | Dr K.R..Nataraj
Design and Implementation of High Performance AHB Arbiter for on chip Bus Architecture

Author(s): ASHUTOSH KUMAR SINGH, | VIMLESH SAHU, | KUSH SONI, | RITA JAIN
Decodificador Turbo MAP de varias iteraciones

Author(s): Richard Chávez | Gabriel Gamarra | Mauricio Pardo
Performance Evaluation of Squaring Operation by Vedic Mathematics

Author(s): Kasliwal Prabha | Patil B | Gautam D
Design and Interfacing of High speed model of FPGA using I2C protocol

Author(s): Arvind Sahu | Ravi Shankar Mishra | Puran Gour
Verilog-Based Design and Implementation of Digital Transmitter for Zigbee Applications

Author(s): Rafidah Ahmad | Othman Sidek | Hafizi Wan Hassin | Shukri Korakkottil Kunhi Mohd | Abdullah Sanusi Husain
Design of AHB protocol block for Advanced Microcontrollers

Author(s): Rishabh Singh Kurmi | Shruti Bhargava | Ajay Somkuwar
A VHDL Based Expert System for HardwareSynthesis

Author(s): Sajjan G. Shiva | Judit U. Jones
Execution of VHDL Models Using Parallel DiscreteEvent Simulation Algorithms

Author(s): Peter J. Ashenden | Henry Detmold | Wayne S. McKeen
Diseño del núcleo de un procesador AVR de 8 bits utilizando lógica programable de Altera

Author(s): Victor Escartín | Pablo Montejo | Dilaila Criado
Diseño de módulos I2C en FPGA de la familia Altera

Author(s): Dilaila Criado | Jorge Alberto Cabot López | Victor Escartín
Diseño de un módulo IP para controlar dispositivos DDS utilizando un núcleo de interfaz PCI

Author(s): Nelia Rosa León González | Abdel Martínez Alonso
Controlador empotrado para PBX de ocho abonados

Author(s): Jaime Fontanella Lauzardo | Víctor Marín Contreras | René Yañes de la Rivera
MODULACIÓN DE SEÑALES BINARIAS POR POSICIÓN DE PULSO EN DISPOSITIVOS FPGA

Author(s): DORA MAR A BALLESTEROS | PAULINE GAMMA | WILLINGTON CAMACHO
Stepper Motor Controller using XC9572 CPLD through Mobile As a Remote

Author(s): Mohini Ratna Chaurasia | Nitin Naiyar
VHDL Modeling of EMG Signal Classification using Artificial Neural Network

Author(s): M.R. Ahsan | M.I. Ibrahimy | O.O. Khalifa | M.H. Ullah
Computational Modeling of Cell Survival Using VHDL

Author(s): Shruti Jain1, | Pradeep K. Naik | Sunil V. Bhooshan
IMPLEMENTATION OF THE TRIPLE-DES BLOCK CIPHER USING VHDL

Author(s): Sai Praveen Venigalla | M. Nagesh Babu | Srinivas Boddu | G. Santhi Swaroop Vemana
DESIGN OF MULTI BIT LFSR PNRG AND PERFORMANCE COMPARISON ON FPGA USING VHDL

Author(s): Amit Kumar Panda | Praveena Rajput | Bhawna Shukla
An Improved Squaring Circuit for Binary Numbers

Author(s): Kabiraj Sethi | Rutuparna Panda
Efficient Hardware/Software Implementation of LPC Algorithm in Speech Coding Applications

Author(s): Wajdi Elhamzi | Rached Tourki | Mohamed Atri | Fatma Sayadi
Efficient Hardware/Software Implementation of LPC Algorithm in Speech Coding Applications

Author(s): Wajdi Elhamzi | Rached Tourki | Mohamed Atri | Fatma Sayadi
A FPGA Implementation of a RISC Processor for Computer Architecture

Author(s): Vijay R. Wadhankar | Vaishali Tehre
High Performance DCT Implementation using NEDA on FPGA

Author(s): Monika Zope | P. S. Mahajani
Implementation of Binary Multiplication using Booth and Systolic Algorithm on FPGA using VHDL

Author(s): Jayashree Taralabenchi | Kavana Hegde | Soumya Hegde | Siddalingesh S. Navalgund
Fast FPGA Implementation of EBCOT block in JPEG2000 Standard

Author(s): Anass Mansouri | Ali Ahaitouf | Farid Abdi
An FPGA-Based Electronic Cochlea

Author(s): Leong MP | Jin Craig T | Leong Philip HW
Bit Manipulation Accelerator for Communication Systems Digital Signal Processor

Author(s): Jeong Sug H | Sunwoo Myung H | Oh Seong K
Cost-Effective Video Filtering Solution for Real-Time Vision Systems

Author(s): Fischer Viktor | Lukac Rastislav | Martin Karl
A MIMO-OFDM Testbed for Wireless Local Area Networks

Author(s): Fàbregas Albert Guilléni | Guillaud Maxime | Slock Dirk TM | Caire Giuseppe | Gosse Karine | Rouquette Stéphanie | Dias Alexandre Ribeiro | Bernardin Philippe | Miet Xavier | Conrat Jean-Marc | Toutain Yann | Peden Alain | Li Zaiqing
Multiple Word-Length High-Level Synthesis

Author(s): Coussy Philippe | Lhairech-Lebreton Ghizlane | Heller Dominique
VLSI Implementation of Adders for High Speed ALU

Author(s): Prashant Gurjar | Rashmi Solanki | Pooja Kansliwal | Mahendra Vucha
CAPTURE OF EVENTS MIDI IN PARALLEL WITH FPGAs'

Author(s): M. Peña | A. De Luca
IMPLEMENTATION OF A NEURON MODEL USING FPGAS

Author(s): M. A. Bañuelos-Saucedo | J. Castillo-Hernández | S. Quintana-Thierry | R. Damián-Zamacona | J. Valeriano-Assem | R. E. Cervantes | R. Fuentes-González | G. Calva-Olmos | J. L. Pérez-Silva
Designing & Implementation of Digital Filter for removal of Power Supply Noise

Author(s): Manish Kansal | Vijay Kumar | Dinesh Arora | Hardeep Singh Saini
Novel Low Power Comparator Design using Reversible Logic Gates

Author(s): Nagamani A N | Jayashree H V | H R Bhagyalakshmi
Low Power Address Generator for Memory Built-In Self Test

Author(s): Ahmed N. Awad | Abdallatif S.Abu-Issa
A 16-Bit Fully Functional Single Cycle Processor

Author(s): Nidhi Maheshwari | Pramod Kumar Jain | D.S. Ajnar
A Novel Architecture for Motion Estimation

Author(s): Subarna Chatterjee
VHDL Implementation of GCD Processor with Built in Self Test Feature

Author(s): Rekha Devi | Jaget Singh | Mandeep Singh
Hardware Approach of ANN Based Iris Recognition for Real-time Biometric Identification

Author(s): Mamun Bin Ibne Reaz | Md. Syedul Amin | Fazida Hanim Hashim | Khandaker Asaduzzaman
FPGA Based Design & Implementation of Embedded System for Tilt Measurement

Author(s): Athar Ravish muzaffar khan | Sanjay Mahadeorao Gulhane | Sanjay L Badjate
VLSI Implementation for Low Noise Power Efficiency Cellular Communication Systems

Author(s): Rondia MACK | Maher RIZKALLA | Paul SALAMA | Mohamed EL-SHARKAWY
Multi-Bias Model for Power Diode Using a Very High Description Language

Author(s): Hassene Mnif | Montassar Najari | Hekmet Samet | Nouri Masmoudi
FPGA Design of an Intra 16 × 16 Module for H.264/AVC Video Encoder

Author(s): Hassen Loukil | Imen Werda | Nouri Masmoudi | Ahmed Ben Atitallah | Patrice Kadionik
A NOVEL APPROACH FOR LOWER POWER DESIGN IN TURBO CODING SYSTEM

Author(s): Dayadi.Lakshmaiah | Dr.M.V.Subramanyam | Dr.K.Sathaya Prasad
Implementation of BIST Structure using VHDL for VLSI Circuits

Author(s): Jamuna.S, | Dr. V.K. Agrawal
Efficient Modular Adders for Scalable Encryption Algorithm

Author(s): K.J. Jegadish Kumar | K.Chenna Kesava | S. Salivahanan
FPGA Implementation of Folded FIR Filter Architecture with Changeable Folding Factor

Author(s): Ivan Milentijević | Vladimir Cirić | Teufik Tokić | Oliver Vojinović
High Speed CT Image Reconstruction Using FPGA

Author(s): Payal Aggarwal | Rajesh Mehra
MAC Implementation using Vedic Multiplication Algorithm

Author(s): Manoranjan Pradhan | Rutuparna Panda | Sushanta Kumar Sahu
VHDL Modeling, Simulation and Prototyping of a Novel Arbitrary Signal Generation System

Author(s): S. A. Abbasi | A. R.M. Alamoud | J. M.A. Shahrani
Subway Train Braking System: A Fuzzy Based Hardware Approach

Author(s): Mamun B.I. Reaz | Jubayer Jalil | Hafizah Husain | Badariah Bais
Design and Field Programmable Gate Array Implementation of Basic Building Blocks for Power-Efficient Baugh-Wooley Multipliers

Author(s): Muhammad H. Rais | Bandar M. Al-Harthi | Saad I. Al-Askar | Fahad K. Al-Hussein
Field Programmable Gate Arrays Based Realization of Truncated Multipliers

Author(s): Muhammad H. Rais | Mohammed H. Mijalli
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