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High Speed Vedic Multiplier for Digital Signal Processors

Author(s): Pushpangadan Ramesh | Sukumaran Vineeth | Innocent Rino | Sasikumar Dinesh | Sundar Vaisak
Performance Evaluation of Squaring Operation by Vedic Mathematics

Author(s): Kasliwal Prabha | Patil B | Gautam D
An Improved Squaring Circuit for Binary Numbers

Author(s): Kabiraj Sethi | Rutuparna Panda
Performance Evaluation and Synthesis of Vedic Multiplier

Author(s): Umesh Akare | T. V. More | R. S. Lonkar

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Tango Rapperswil

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