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International Journal of Reconfigurable and Embedded Systems (IJRES)

ISSN: 2089--4864
Publisher: Institute of Advanced Engineering and Science


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Queued-Stack Dataflow Processing Element for a Cognitive Sensor Platform

Author(s): Mark McDermott
Volume: 1
Issue: 3
Year: 2012
VHDL Implementation of H.264 Video Coding Standard

Author(s): Haresh A. Suthar
Volume: 1
Issue: 3
Year: 2012
Digital Control of Static Var Compensator with Field Programmable Gate Array

Author(s): Ram Shankarrao Dhekekar | N. V. Srikanth
Volume: 1
Issue: 3
Year: 2012
AES Encryption Algorithm Hardware Implementation: Throughput and Area Comparison of 128, 192 and 256-bits Key

Author(s): Samir El Adib | Naoufal Raissouni
Volume: 1
Issue: 2
Year: 2012
FPGA Based a PWM Technique for Permanent Magnet AC Motor Drives

Author(s): Tole Sutikno | Nik Rumzi Nik Idris | Nuryono Satya Widodo | Auzani Jidin
Volume: 1
Issue: 2
Year: 2012
Vehicle Accident Automatic Detection and Remote Alarm Device

Author(s): Varsha Goud
Volume: 1
Issue: 2
Year: 2012
FPGA Implementation of a 64-Bit RISC Processor Using VHDL

Author(s): Imran Mohammad | Ramananjaneyulu K
Volume: 1
Issue: 2
Year: 2012
Controller for Network Interface Card on FPGA

Author(s): Suchita Kamble | N. N. Mhala
Volume: 1
Issue: 2
Year: 2012
Design and Implementation of Modified Partial Product Reduction Tree for High Speed Multiplication

Author(s): sachin Balkrishna Jadhav
Volume: 2
Issue: 1
Year: 2012
Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator

Author(s): Tole Sutikno | Aiman Zakwan Jidin | Auzani Jidin | Nik Rumzi Nik Idris
Volume: 1
Issue: 1
Year: 2012
Real-time Optical-flow Computation for Motion Estimation under Varying Illumination Conditions

Author(s): Julio C. Sosa | Roberto Rodríguez | Víctor H. García Ortega | Rubén Hernández
Volume: 1
Issue: 1
Year: 2012
A Novel FPGA based Leading One Anticipation Algorithm for Floating Point Arithmetic Units

Author(s): Ashwini Suresh Deshmukh
Volume: 1
Issue: 1
Year: 2012
Effectual SVPWM Techniques and Implementation of FPGA Based Induction Motor Drive

Author(s): Saravanan M | Nandakumar R | Veerabalaji G
Volume: 1
Issue: 1
Year: 2012
A Novel High Speed FPGA Architecture for FIR Filter Design

Author(s): Sachin B. Jadhav | Nikhil Niwas Mane
Volume: 1
Issue: 1
Year: 2012
Configurable Router Design for Dynamically Reconfigurable Systems based on the SoCWire NoC

Author(s): Arash Farhadi Beldachi | Mohammad Hosseinabady | Jose Luis Nunez-Yanez
Volume: 2
Issue: 1
Year: 2012
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